1. Field of the Invention
The present invention relates to a method for manufacturing a polycrystalline silicon thin film transistor (TFT).
2. Description of the Related Art
Polycrystalline silicon TFT's are used in integrated circuits, particularly, load elements of a static random access memory (SRAM) and liquid crystal devices (LCD's).
In a prior art method for manufacturing a TFT, a polycrystalline silicon layer, a gate insulating layer, a gate electrode layer, a non-doped insulating layer, and a metal connection layer are formed on a substrate, and then, a hydrogen, passivation using hydrogenation by plasma discharge is carried out, to thereby reduce trap state densities of the polycrystalline silicon layer and improve the performance of the TFT (see: I-WEI WU et al. "Effect of Trap-State Density Reduction by Plasma Hydrogeneration in Low-Temperature Polysilicon TFT", IEEE ELECTRON DEVICE LETTERS, VOL. 10, No. 3, PP. 123-125, March 1989). This will be explained later in detail.
In the above-described prior art method, however, a time period for carrying out the hydrogen passivation is very long, for example, about 16 hours.
On the other hand, in order to reduce the time period for carrying out the hydrogen passivation, after the polycrystalline silicon layer is exposed to the air, a hydrogen passivation is performed thereupon (see: JP-A-HEI4-349637). In this case, however, the surface of the polycrystalline silicon layer is damaged by plasma, which coarsens the surface thereof.